SA8295P Automotive Development Platform
Snapdragon™ Automotive Development Platform (ADP) based on the Qualcomm® Snapdragon™ Automotive chipset from Qualcomm® Technologies, Inc.

The SA8295P Snapdragon™ Automotive Development Platform (ADP) based on the Qualcomm® Snapdragon™ Automotive chipset from Qualcomm® Technologies, Inc. (QTI) provides OEMs and ecosystem partners with access to QTI’s high-performance automotive infotainment platform.
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SA8295P Automotive Development Platform Overview
This version of the ADP features the top tier QAM8295P. QAM8295P is the next generation Qualcomm® Snapdragon™ automotive infotainment module designed for superior performance and power efficiency. It has been developed as an SEooC (safety element out of context) targeting assumed ASIL B use cases.
SA8295P includes the following key components: Qualcomm® Kryo™ 695 CPU built on Arm v8 Cortex technology, Qualcomm® Adreno™ 695 GPU, Dual Qualcomm® Hexagon™ Tensor Processors, Qualcomm Spectra™ ISP 395, Adreno 665 VPU, Adreno DPU 1199, and dedicated Safety manager subsystem.
This product is available in two configurations:
1. SA8295P Automotive Development Platform
2. SA8292P Automotive Development Platform with Thermal Enclosure Configuration
SA8295P Automotive Development Platform Tech Specs
- Qualcomm® Kryo™ 695 CPU built on Arm v8 Cortex technology
- Qualcomm® Adreno™ 695 GPU for the highest in graphics performance and power efficiency
- Dual Qualcomm® Hexagon™ Tensor Processors integrated with Qualcomm Hexagon DSP, quad Qualcomm Hexagon Vector eXtensions (HVX) processor, and dual Qualcomm Hexagon Matrix eXtensions (HMX) coprocessors for high performance machine learning use cases
- Qualcomm Spectra™ ISP 395 image processing engine
- Adreno 665 VPU for high-quality, ultra HD video encode and decode
- Adreno DPU 1199 for ultra HD multi-display support
- Dedicated Safety Manager Subsystem equipped with dual ARC HS46 CPU in lock-step mode
- Four 4-lane MIPI CSI configurable in 4 + 4 + 4 + 4 or split 2s configuration
- Three DisplayPorts, one of them shared with USB 3.1
- Four 4-lane embedded DisplayPort v1.4b
- Two 4-lane MIPI DSI D-PHY v1.2
- 6V to 20V. Typical 12V DC
- 1x Aurix TC397xx
- Eight-channel high-speed memory – 2133 MHZ LPDDR4X SDRAM with optional low-power features (8×16-bit) 16 GB
- Two UFS 3.1 gear 4-2 lanes for on board memory (UFS0 as booth up device)
- NVMe via PCIe (not-bootable)
- JTAG: SoC, VIP
- USB debug UARTs
- Test automation
- Wi-Fi 6 (802.11ax) + Bluetooth 5.2 Dual MAC MIMO + MIMO (QCA6696)
- Dual-band dual-MAC radios for concurrent 2×2 MIMO 2.4GHz + 2×2 MIMO 5GHz operation
Combined simultaneous maximum PHY rate of 1774Mbps - 1x 1000 BaseT1
- 2x 100 BaseT1
- 4x CAN-FD
- 2x LIN
- Gyro, Accelerometer – ASM330LHH
- Magnetometer – AK09917D
- Six Class D Amplifier Analog OUT
- Four Analog/MIC Inputs
- Two A2B
- Linux
ProcessorSnapdragon SA8295P SIP |
CameraDisplayPower Supply |
Safety MCUMemoryStorageTest and Debug |
ConnectivityI/OSensors
|
Audio |
OS Support |
SA8295P Automotive Development Platform Resources
SA8295P Automotive Development Platform Downloads
SA8295P Automotive Development Platform Part Numbers
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